Memory arrays are utilized for programmable data storage. For instance, dynamic random access memory (DRAM) is commonly utilized for programmable memory storage. The DRAM will typically be formed as an array of individual memory cells, with each cell comprising a transistor and a memory storage device. The memory storage devices will typically be capacitors. The transistors will be formed within wordlines which extend across the DRAM array. A series of bitlines will also be provided across the DRAM array. Bits of information are written to, or read from, a memory storage device of an individual DRAM cell by activating a specific combination of a wordline and a bitline. Accordingly, each memory device of the DRAM array can be specifically addressed with the appropriate combination of a wordline and a bitline.
DRAM arrays are typically fabricated as integrated circuitry associated with a semiconductor substrate. Continuing goals of semiconductor device processing are to increase a scale of integration, simplify processing, and reduce costs. It is desired to create new methods of forming DRAM arrays for progressing toward one or more of such continuing goals.
Inventive aspects described herein can be particularly useful for fabrication of DRAM arrays. However, it is to be understood that although the invention is described herein primarily for application to DRAM arrays, the invention can also be applied to other semiconductor fabrication processes and to other memory arrays, as will be recognized by persons of ordinary skill in the art.